Yaqub Mahnashi* and Hussain Alzaher
Electrical Engineering Department King Fahd University of Petroleum and Minerals , Dhahran, Saudi Arabia
Received Date: June 14, 2012; Accepted Date: June 25, 2012; Published Date: June 30, 2012
Citation: Mahnashi Y, Alzaher H (2012) Applying the Difference Term Approach for Low Frequency Biomedical Filter. J Biosens Bioelectron S11:004. doi:10.4172/2155-6210.S11-004
Copyright: © 2012 Mahnashi Y, et al. This is an open-access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.
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Low frequency continuous time filters are essential analog blocks for biomedical applications. Integrating such filters having large time constants is difficult as it requires large component values. A novel approach to scale down the pole frequency is presented. A 5-bit reduction in the cut off frequency is achieved. This is made possible through adding a passive resistor in the forward path of the op-amp based integrator introducing a difference term of the pole frequency. Also, the filter topology is modified to avoid changing the quality factor. As an example, a 2nd order low pass filter is designed and simulated. Simulation results show that the pole frequency is scaled down from 1.43 MHz to 4.97 kHz while maintaining tuning of 30% around the nominal value by controlling only one resistor.
Very low frequency filters has wide range of applications in biomedical signal processing [1-6]. The bandwidth of Electroencephalogram (EEG), for example, refers to the monitored signal due to the brain activities and Electrocardiogram (ECG) which is a test for the electrical activities that being recorded due to the heart beat’s, is 0.1-30 Hz and 0.01-100 Hz, respectively. The amplitude and frequency ranges of some physiological signals are depicted in Figure 1 .
Amplification and pre-filtering of these signals are mandatory before further digital signal processing (DSP). However, such very low frequency filters needs large passive components values which cannot be implemented in standard analog integrated circuit (IC) fabrication. Typical values for integrated resistors are from several ohms to 40kΩ and for capacitors are from 0.5 pF to 50 pF . This has been a challenging design problem due to the difficulty in developing efficient methods to achieve large time constant using integrated passive elements. This paper presents a new CMOS circuit technique for implementing a very low frequency Active-RC based filters by applying a difference term approach which has been used for realizing very low frequency oscillator. The following section presents the methodology of the proposed technique. Simulation results are given below.
The transfer function of the low pass filter is given in the following equation:
where K is the gain of the filter, Q is the quality factor, BW represents the bandwidth and ω is the corner frequency (3-dB frequency). The corner frequency of the low pass is given by:
Obviously to get low frequencies in the range of few hertz to few kilo-hertz, large capacitors and resistors are needed. One novel approach to scale down the frequency is to introduce a difference term of R1and R2, m=R1-R2, in ω term. So, as m decreases the frequency scaled down and very low corner frequency can be obtained. This approach has been used for realizing very low frequency oscillators 'VLFO' [8-10]. The challenge in this approach in filter design is to introduce difference term m, not only in the pole frequency ω, but also in the s-coefficient term, , to cancel the effect of m in Q and hence the quality factor can be controlled via ratio of resisters independent of R1-R2. So the filter topology is adjusted to tackle this problem by introducing a square of the difference term m2, in the pole frequency and m in the s-coefficient term and hence the effect of m on the Q is cancelled. Also m2 is introduced in the numerator coefficient such that the gain is not disturbed.
A low pass filter can be obtained using the integrator shown in (Figure 2) in two integrator loop topology. The transfer function of this filter shown in (Figure 3) is obtained as follows:
From the above transfer function and assuming Rf = R5 = R, R1 = R3, R2 = R4 and C1 = C2 = C, we can obtain the DC gain, the corner frequency and the quality factor as follows:
In this topology, it can be seen clearly that the DC gain, the quality factor and the corner frequency can be all controlled independently (Equation 4-Equation 6). Moreover, the corner frequency can be scaled down exploiting the presence of the difference term of resistors in the numerator. However, this technique suffers from the high sensitivity (Equation 8). The sensitivity for the proposed filter is given below:
SPICE Simulation tests have been done using 2nd order low pass filter (LPF) with frequency scaling technique and values of C = 100 pF, R1 = 10 KΩ for different cases of R2. Using Mont Carlo analysis, the filter has been extensively simulated for 100 runs with an applied resistance tolerance of 1% to R1 and R2 to check the reliability of the proposed filter. The frequency responses of three different cases, namely R2 = 9.4 kΩ, R2 = 5 kΩ and R2 = 1 kΩ, are provided in Figure 4. It can be noticed that the pole frequency is scaled down from 1.43 MHz to approximately 9.9 kHz for R2 = 9.4 kΩ by controlling only R2.
Figure 5 shows the histogram of one case where a 4-bit pole frequency reduction is achieved R2 = 9.4kΩ, which represents the distribution of the samples developed by Monte Carlo analysis over a range of frequency. Table 1 summaries the results obtained from the conducted simulation and percentage of error.
|R2 (kΩ)||Number of Bit Reduction, n||Pole Frequency (kHz)||Deviation from Nominal value||In Range Samples out of 100|
Table 1: Summary of the monte carlo simulation.
It can be interfered from (Table 1) that this technique can be used for both directions, up scaling and down scaling. Capacitor arrays can be incorporated to introduce a 30% tuning in the pole frequency which was achieved in lately published work . As a result, a 5-bit pole frequency reduction can be realized as indicated in (Table1) giving a probability of p=0.76 and a 6-bit reduction if we allow 50% tuning.
A new CMOS circuit technique for implementing a very low frequency active-RC based filter by employing the difference term approach is proposed. Sensitivity and independent gain, quality and pole frequency programmability is addressed. Simulation results of the filter shows a huge range of pole frequency scaling from 1.43 MHz to 4.97 KHz. These results are promising and we are working in optimization phase to meet certain specifications heading to IC fabrication. Finally, this technique can be combined with other techniques, R2R approach for example, to realize a very low pole frequency in order of 0.1 Hz.
The authors would like to acknowledge the support of King Fahd University of Petroleum & Minerals, KFUPM, through Deanship of Scientific Research and King Abdul-Aziz City for Science and Technology, KACST (Project No: ARP- 29-99).