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PhD in Electronic and Electrical Engineering, University of Bradford, UK. Title: “Applicability of Programming Code to Hardware Specification and Synthesis”.Higher Diploma in Electronic and Electrical Engineering, National Technical University of Athens.PACE Teaching Company Scheme, University of Bradford.Post-doctoral Research Officer, (the) University of Oxford.My work in VLSI/ASIC design included EDA tools and systems (including Synopsys, Cadence, Solo (ES2), Viewlogic, Mentor Graphics, Xilinx, Altera tools); extensive use of software and hardware modelling languages for specification, modelling, simulation and design implementation (Model, VHDL, Verilog, Abel and Abel-like), standard and proprietary design languages, intermediate/library design database formats (EDIF, Verilog, SDF, NDL), with technologies such as CMOS gate array, standard cell, semi-custom, full-custom, and FPGAs. Worked on electronic circuits and systems at all abstraction levels (algorithmic, behavioural, functional, RTL, logic), design re-targeting, complex chip-system integration and test methodologies and pattern generation.
Structured and Object-oriented programming, Computer Architecture, Advanced (parallel) Architectures, Combinational and Sequential Digital Circuits, Design of Embedded VLSI Systems, Design of Digital Systems with VHDL
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