Adaptive Decision Feedback Equalization for Multi-Gbps Serial Links: Challenges and OpportunitiesFei Yuan*
Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada
- *Corresponding Author:
- Fei Yuan
Department of Electrical and Computer Engineering
Ryerson University, Toronto, ON, Canada
E-mail: [email protected]
Received date: December 15, 2015 Accepted date: December 22, 2015 Published date: December 28, 2015
Citation: Yuan F (2015) Adaptive Decision Feedback Equalization for Multi-Gbps Serial Links: Challenges and Opportunities. Sensor Netw Data Commun 5:132. doi:10.4172/2090-4886.1000132
Copyright: © 2015 Yuan F. This is an open-access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.
This editorial briefly examines challenges in design of adaptive decision feedback equalizers for multi-Gbps serial links. The state-of-the-art of serial links over wire channels is briefly reviewed. The impairment of wire channels at high frequencies and their effect on the performance of serial links are examined. It is followed with a close examination of channel equalization techniques to combat inter-symbol interference. Challenges and opportunities in design of adaptive feedback equalizers including timing constraints, power consumption, adaptive references for error generation and thresholds for logic state determination, data-DFE, eye-opening monitor DFE, and edge-DFE, floating tap DFE are examined.