Effect of High-K Oxide Layer on Carrier Mobility
|Mr. Abhishek Verma1, Dr. Anup Mishra2, Arpita Jha3 and Kritika Verma3
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Over the past three decades CMOS has emerged as the basis of design in nanotechnology. MOSFETS provide an easier way of fabrication due to their ease of manufacturing and lower power consumption than the BJTs. However the use of high k materials to follow Moore’s Law, has created certain problems in the working of these devices. In this review we have dealt with the mobility related issue, which has been a major cause of concern. The degradation of mobility due to Coulomb scattering, Phonon scattering and other methods have been focused upon. The remedies of mobility improvement have also been highlighted. This review entails about the basic details of mobility in these devices with SiO2 and also with other high k materials. There are certain mechanisms which wrongly measure the count of charge carriers and give an overestimation or underestimation of the mobility, causing serious concern. The errors in mobility calculation and the overestimation of carrier count is a part of this review.