alexa Fast Flexible FPGA-Tuned Networks-on-Chip
ISSN ONLINE(2278-8875) PRINT (2320-3765)

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
Open Access

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Research Article

Fast Flexible FPGA-Tuned Networks-on-Chip

Deepan Raj.B1, T.V.P.Sundararajan2, K.Shoukath Ali3
  1. PG Scholar, Department of ECE, Bannari Amman Institute of Technology, Sathyamangalam, Tamilnadu,India
  2. Professor, Department of ECE, Bannari Amman Institute of Technology, Sathyamangalam, Tamilnadu, India
  3. Assistant Professor, Department of ECE, Bannari Amman Institute of Technology, Sathyamangalam, Tamilnadu, India
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Abstract

To design 4x4 Mesh, Fat Tree16, Ring16 and Double Ring networks using CONNECT based NoC that embodies a set of FPGA-motivated design principles that uniquely influence key NoC design decisions, such as topology, flit width, router pipeline depth and flow control. The flexibility, lightweight nature and high performance of CONNECT-based NoCs makes them ideal candidates for use in FPGA-based research studies. In this project evaluating these networks with different FPGA family and analysing the efficient FPGA family using the Xilinx ISE software. In the 4x4 mesh configuration when evaluated using synthesis results of different FPGA family, reduced logic resource cost is obtained. To demonstrate CONNECT's flexibility and extensive design space coverage, different CONNECT networks are synthesized

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