alexa Constant Coefficient Multiplication Using Look-Up Tables.
Engineering

Engineering

Research & Reviews: Journal of Engineering and Technology

Author(s): Michael J Wirthlin

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Multiplication is an important but expensive operation in most FPGA-based signal processing systems. Many techniques have been introduced for reducing the size and improving the speed of FPGA-based multipliers. Constant-coefficient multipliers are an important class of such multipliers that reduce FPGA resource requirements by exploiting constant-specific optimizations. This paper reviews and analyzes a constant coefficient multiplier that exploits the fine-grain memory resources of FPGAs by performing table look-up. Several optimizations to this multiplier are introduced and analyzed. This paper will also introduce several techniques for reducing the resources of this multiplier by exploiting modern FPGA architectural enhancements.

This article was published in Journal of VLSI Signal Processing IEEE. and referenced in Research & Reviews: Journal of Engineering and Technology

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