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Research Article Open Access
The main aim of this paper is to present a novel design of charge sharing SRAM which is obtained from SRAM design of inbuilt charge sharing SRAM (10T).As in the existing design we also use the read discharge power is reused. The read as well as write bit line swings are reduced by recycling the read current. The proposed SRAM design reduces the transistor count, which in turn reduces the power consumed when compared to existing designs. The proposed SRAM also reduces the area. The results show the performance of the design.