alexa A Low Power Content Addressable Memory Implemented In Deep Submicron Technology
ISSN ONLINE(2319-8753)PRINT(2347-6710)

International Journal of Innovative Research in Science, Engineering and Technology
Open Access

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Research Article

A Low Power Content Addressable Memory Implemented In Deep Submicron Technology

Divyashree.M, Bhagya. P
  1. P.G. Student, Dept. of E&C, Don Bosco Institute of Technology, Bangalore, Karnataka, India
  2. Associate Professor, Dept. of E&C, Don Bosco Institute of Technology, Bangalore, Karnataka, India
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Abstract

In this paper basic CAM (Content Addressable memory) cell performs match and mismatch operation. CAM provides fast data search operation and it is also used as search engines. The CAM cell comprises of NAND cell block of array (1x8) and NOR cell block of array (4x32). Here in this paper 45nm technology (transistor sizing) with the supply voltage of 1V is used. The data stored in the CAM cell will be compared with the low swing search data on the search lines. The NAND and NOR match-lines of the cell blocks will reduce the power consumption of match lines. The proposed LSSL (Low Swing Search Line)-CAM architecture uses both NAND and NOR array in order to reduce the power and increase the speed. It also reduces the SL power by reducing the switching activity of search lines.

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