alexa Implementation of Resource Efficient Address Generating Circuit for WiMAX Interleaver
ISSN ONLINE(2320-9801) PRINT (2320-9798)

International Journal of Innovative Research in Computer and Communication Engineering
Open Access

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Research Article

Implementation of Resource Efficient Address Generating Circuit for WiMAX Interleaver

Prasannakumar M N1, Padma Gayathri T K2
  1. M Tech (Electronics), Department of ECE, Sir M Visvesvaraya Institute of Technology, Bangalore, India
  2. Assistant Professor, Department of Telecommunication Engineering, Sir M Visvesvaraya Institute of Technology, Bangalore, India
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Abstract

Communication is the most important thing in this modern world, everyday new trends are emerging. Recently the immense demand for internet access and cellular services has led to the demand of communication standard which provides high data rate, coverage and mobility. WiMAX is becoming popular as an option for the last mile connection replacing cable modems and DSL connections. Specifically, WiMAX, the IEEE 802.16 standard came as a wireless MAN standard. But these communication channels are suppressed by burst error. The channel interleaver employed in the WiMAX transmitter plays a vital role in minimizing the effect of burst error. As per IEEE 802.16e standard this interleaver is explained by two permutation steps. But the implementation of these permutation steps is complex because of presence of floor function. Hence, in this approach simple and resource efficient algorithm is proposed to eliminate the requirement of floor function along with its mathematical background to implement the address generating circuit for WiMAX interleaver on FPGA.

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