Performance Comparison of Wallace Multiplier Architectures
|I. Hussain1, R. K. Sah1, M. kumar2
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Multipliers are the basic building blocks of many VLSI computational units. The performance of such VLSI circuits depends on the performance of multipliers. Hence designing a high performance multiplier is a challenging task for VLSI designers. Wallace tree multiplier or Wallace multiplier is the most popular multiplier among the existing multipliers. Wallace multiplier is also known for its fast speed and low power consumption. Different techniques for designing a Wallace multiplier are available in the literature. In this paper, performance comparison review of various Wallace multiplier architectures is included.