alexa A Low Power and High Speed MPSOC Architecture for Reco
ISSN ONLINE(2319-8753)PRINT(2347-6710)

International Journal of Innovative Research in Science, Engineering and Technology
Open Access

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Special Issue Article

A Low Power and High Speed MPSOC Architecture for Reconfigurable Application

 
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Abstract

A multiprocessor system on chip that incorporates all the components inside the chip and used for multiprocessing application. MOLEN is a reconfigurable architecture based on co-operation between a general purpose processor and custom computing unit. MOLEN incorporates an arbitrary number of programmable units exposes the hardware to the programmers and Designers allows them to modify and extend the processor functionality at will. It solves a number of limitations of existing approaches, such as the opcode space explosion, and it requires only a one time extension of the instruction set to incorporate an almost unlimited number of reconfiguration functions per single programming space. For our paper we have done multiple surveys for the development of MOLEN architecture.

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