alexa Comparative Study of Power, Delay and Noise of Logic G
ISSN ONLINE(2278-8875) PRINT (2320-3765)

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
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Research Article

Comparative Study of Power, Delay and Noise of Logic Gates between CMOS and GaAs MESFET

Saradindu Panda1*, Sanjoy Bhadra1*, B.Maji2*, A.K.Mukhopadhyay3*
  1. Dept. of Electronics and Communication Engineering, Narula Institute of Technology, Kolkata, India
  2. Dept. of Electronics and Communication Engineering, NIT, Durgapur, India.
  3. Director, BITM, Santiniketan, Birbhum.West Bengal, India
Corresponding Authors: Saradindu Panda, E-mail: [email protected]
Sanjoy Bhadra, E-mail: [email protected]
B.Maji, E-mail: [email protected]
A.K.Mukhopadhyay, E-mail: [email protected]
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This Gallium Arsenide MESFET based an absolutely new model of universal gates has been designed, analysed, reviewed & compared. Overall the newly designed model is fed by physical inputs which are highly researched and developed several times. This model is capable to remove all the difficulties of previously proposed and designed models. The necessity of implementing this type of structure is to encounter absence of dielectric in the CMOS structure [1]. As we remember structure of MOSFET; there Si was implanted beneath the gate and this oxide layer actually acts as the dielectric material alike to any capacitor. Actually there is no provision to implement such kind of dielectric during the fabrication process of the MESFET. Observing this analogical difference it is planned that if somehow any kind of dielectric material which is nearer to the ox ide layer, implanted in the MOSFET during fabrication, is planted in the gate terminal without hampering the fabricated structure the device will analogically same as the MOSFET. This is actual motto to implement MESFET based design.


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