alexa Design and Implementation of EPC Gen2 Using FPGA
ISSN ONLINE(2319-8753)PRINT(2347-6710)

International Journal of Innovative Research in Science, Engineering and Technology
Open Access

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Research Article

Design and Implementation of EPC Gen2 Using FPGA

Pallavi J 1, Kavitha T M 2
  1. P.G. Student, Department of electronics and communication, DBIT, Bangalore, India
  2. Assistant professor, Department of electronics and communication, DBIT, Bangalore, India
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Electronic Product Code or EPC Global class-I Generation-I and Generation-II are popular and globally accepted standard specification which enables the use of password protection for accessing the data stored in the memory of a RFID tag. Use of password gives one of the ultimate securities for the RFID system but these are not immune to ‘hacking’. Hackers are adopting advance technologies like side attack, power analysis to detect data password. But in many cases it is very much important that data must be secured enough. In this paper, we propose a data security system integrated with this protocol based on RSA algorithm. The RSA system is widely employed in networking applications and achieves good performance and high security. We have implemented the protocol in VERILOG.A synthesizable module is presented here in this article. System efficiency is evaluated according to the implementation.


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