alexa Designing of Self Immunity Technique for 64bit Registe
ISSN ONLINE(2278-8875) PRINT (2320-3765)

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
Open Access

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Research Article

Designing of Self Immunity Technique for 64bit Register File against Soft Errors

Supriya Sarkar1 , Asst.prof.Tejaswini.R.Choudari2
  1. Student, Dept. of ECE, RKDF Institute Of Science And Technology, Bhopal, India
  2. Assistant Professor, Dept. of ECE, RKDF Institute Of Science And Technology, Bhopal, India
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Abstract

VLSI technology reduces the size of the digital components, reduce the power consumption and increase the speed of operation. In these criteria digital devices are more sensitively manufacturing. These type of devices mostly effected by soft errors, then it reduces the life of the devices (microprocessor, microcontrollers), it is nothing but vulnerability of microprocessors or microcontroller applications. The register file is one of the essential architectural components where soft errors can be very mischievous because errors may rapidly spread from there throughout the whole system. Thus, register files are recognized as one of the major concerns when it comes to reliability. This paper introduces Self-Immunity, a technique that improves the integrity of the register file with respect to soft errors. We show that our technique can reduce the vulnerability of the register file considerably while exhibiting smaller overhead in terms of area and power consumption compared to state-of-theart in register file protection.

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