alexa Fast Fir Algorithm Based Area- Efficient Parallel Fir
ISSN ONLINE(2278-8875) PRINT (2320-3765)

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
Open Access

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Research Article

Fast Fir Algorithm Based Area- Efficient Parallel Fir Digital Filter Structures

  1. Assistant Professor, Dept. of ECE, J.K.K.College of Technology, TN Palayam,Gobi, Erode, Tamilnadu, India
  2. Assistant Professor, Dept. of ECE, Shree Vengateshwara hi-tech Engineering College, Gobi, Erode, Tamilnadu, India
  3. Assistant Professor, Dept. of ECE, Sri Shanmugha College of Engineering and Technology, Gobi, Erode, Tamilnadu, India
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In digital systems, the filters occupy a major role. This work describes the design of parallel FIR filter structures using poly-phase decomposition technique that requires minimum number of multipliers and low power adders. Normally multipliers consume more power and large area than the adders. For reducing the area, this filter structure uses adders instead of multipliers since the adder requires low power and less area than the multipliers. Moreover, number of adders does not increase along with the length of parallel FIR filter. Finally the proposed parallel FIR filter structures are beneficial in terms of hardware cost and power when compared to the existing parallel FIR filter structure.


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