alexa Power and Delay Analysis of Double Edge Triggered D-Fl
ISSN ONLINE(2278-8875) PRINT (2320-3765)

International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
Open Access

OMICS International organises 3000+ Global Conferenceseries Events every year across USA, Europe & Asia with support from 1000 more scientific Societies and Publishes 700+ Open Access Journals which contains over 50000 eminent personalities, reputed scientists as editorial board members.

Open Access Journals gaining more Readers and Citations

700 Journals and 15,000,000 Readers Each Journal is getting 25,000+ Readers

This Readership is 10 times more when compared to other Subscription Journals (Source: Google Analytics)

Research Article

Power and Delay Analysis of Double Edge Triggered D-Flip Flop based Shift Registers in 16nm MOSFET Technology

 
To read the full article Peer-reviewed Article PDF image

Abstract

Flip-Flop is an electronic circuit that stores a logical state of one or more data input signals in response to a clock pulse. During recurring clock intervals to receive and maintain data for a limited time period sufficient for other circuits within a system to further process data. Power dissipation is an important parameter in the design of VLSI circuits, and the clock network is responsible for a substantial part of it (up to 50%). When the supply voltage is decreased the speed of the logic circuits might be diminished due to reduction in effective input voltage to the transistors. The optimal supply voltage for CMOS logic in terms of Energy-Delay-Product (EDP) is close to the threshold voltage of the nMOS transistor Vtn for the actual process, assuming that the threshold voltage of the pMOS transistor Vtp is approximately equal to −Vtn . The famous Moore’s law states that the number of transistors that are to be integrated on a single die gets doubled for every 18 months and which provens that area of the design is also a major concern. Hence in this paper all the three major concerns of VLSI world, the power consumed, speed and area consumption are concentrated.

Keywords

Share This Page

Additional Info

Loading
Loading Please wait..
Peer Reviewed Journals
 
Make the best use of Scientific Research and information from our 700 + peer reviewed, Open Access Journals
International Conferences 2017-18
 
Meet Inspiring Speakers and Experts at our 3000+ Global Annual Meetings

Contact Us

 
© 2008-2017 OMICS International - Open Access Publisher. Best viewed in Mozilla Firefox | Google Chrome | Above IE 7.0 version
adwords