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Research Article Open Access
In this paper, we present a novel approach to reconfigurable processor which has been applied for binary image processing The processor’s architecture is a combination of a reconfigurable binary processing module, input and output image control units, and peripheral circuits. The reconfigurable binary processing module, which consists of mixed-grained reconfigurable binary compute units and output control logic, performs binary image processing operations. Each Binary Compute unit performs different operations such as Median filtering, Dilation, Erosion and Binarization respectively. Each binary computational unit has unique operation implemented with related algorithm which can be used for different applications. The simulation and experimental results demonstrate that the processor is suitable for real-time binary image processing applications. This processor is designed in VHDL language and implemented on Xilinx-Vertex 5 Field Programmable Gate Array.