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Research Article Open Access
A single phase multilevel inverter for dc to ac conversion is developed with minimum number of power electronic devices and isolated DC sources and implemented using FPGA. The total harmonics of the output waveform is reduced by increasing the switching modes with reduced devices. The H-Bridge multilevel inverter has two inverters connected in cascade. The lower inverter is capable of developing a multilevel output and another inverter develops two-level output. Both the inverters operate at different frequency to produce multilevel output. The H-Bridge multilevel inverter has been analyzed in asymmetric conditions. The project work to be proposed is to reduce total harmonic distortion with less number of devices. By increasing the voltage levels at the output, the harmonics of the output waveform can be reduced and made negligible. The topology also produces minimum switching losses compared to the existing methods. The voltage rating of the upper H bridge inverter switches and auxiliary switches in the lower H bridge inverter becomes smaller and smaller compared to the output voltage when the number of levels is increased.The hybrid modulation algorithm is simulated using MATLAB/Simulink. The VHDL code for each of this topology was written and synthesized using Xilinx ISE software. Behavioral Simulation was performed on the architecture and after verifying the results this VHDL code was downloaded to SPARTAN 3A DSP board.