alexa Abstract | Packet Switching - Queuing Architecture: A Study
ISSN ONLINE(2320-9801) PRINT (2320-9798)

International Journal of Innovative Research in Computer and Communication Engineering
Open Access

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Research Article Open Access


In this paper, the packet switching architecture with output queuing is used. Here the switch is internally non-blocking, but if packets destined to same outputs, output blocking will occur and (even if there are output queues) has a capacity of N*N2.An exact model of the switch has been developed which can be used to determine the blocking performance of the switch and obtain both its throughput and packet loss characteristics. In this architecture, each line card is connected by a dedicated point to point link to the central switch fabric. Two structures can be classified as Centralized and Distributed. Buffer arrangements are also categorized into output queued and combined input- output queued switches and hardware complexity of OQ, VOQ are also discussed

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Author(s): Shikhar Bahl, Rishabh Rai, Peeyush Chandra, Akash Garg

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