Area Efficient 16 Point Radix 4 Complex Fast Fourier Transform Algorithm for Efficient FPGA Implementation Using NEDA with Modified CSLA
|Sangeetha Vijayan PG Student [VLSI and Embedded Systems], Department of ECE, Saintgits College Engineering, Kottayam, Kerala, India|
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Fast Fourier Transforms (FFT), Discrete Cosine Transforms (DCT) are major blocks in communication systems.FFT is used to compute DFT with reduced number of arithmetic units. The major applications of FFT include signal analysis, image filtering, sound filtering, data compression, partial differential equations etc. The proposed design reports the architecture of 16 point complex FFT core using NEw Distributed Arithmetic (NEDA) algorithm. In order to implement FFT, radix-4 Decimation-In-Time algorithm is used. NEw Distributed Arithmetic is used for complex multiplications. It is one of the techniques used to implement many digital signal processing systems that require multiply and accumulate units. The advantage of the NEDA is that, it is a multiplier-less and ROM- less method and the entire section can be implemented using adders and shifters only, thus minimising the hardware requirement compared to other architectures. In the NEDA section, modified carry select adder with Binary-to-Excess one Converter (BEC) logic is used for addition. The design is simulated by using ModelSim SE(6.2b) and synthesised by Xilinx ISE project navigator(13.2).The synthesis results are taken for different Virtex FPGAs (Virtex 4,Virtex 5,Virtex 6).These results show that the computation for calculating the 16 point FFT is efficient in terms of area and power using the proposed method.