Fine-Grain Redundancy Techniques for High- Reliable SRAM FPGA`S in Space Environment: A Brief Survey
|T.Srinivas Reddy, J.Santosh, J.Prabhakar
Assistant Professor, Department of ECE, MREC, Hyderabad, India1
|Related article at Pubmed, Scholar Google|
SRAM based reprogrammable FPGA with high-flexibility combined with high-performance have become increasingly important for use in space applications. With the advances in technology, the device size decreasing below nm, FPGAs used in space environment are more susceptible to radiation. The radiation effects can cause Single Event Upset (SEU) which are soft-errors and non-destructive. This can appear as transient pulses in logic or support circuitry, or as bit flips in memory cells or registers of SRAM cells and respectively change the function of logic elements within FPGA. There are various methodologies proposed in the literature that would reduce the effects and the mask them for proper device operation. In the paper we study the various redundancy techniques that have been proposed to improve reliability of the system designed with SRAM FPGA`s.